Amber ARM-compatible core

Hi,

For those of you that have an FPGA board without any UART connector available, you may be interested in the ALTERA JTAG UART feature and the nios2-terminal. This can be achieved very simply by modifying the file "uart.v" ( Revision 82 ) located into directory "hw\vlog\system\".

The procedure is the following:

1/ Insert the following line after line 171:

wire tx_fifo_pop;

2/ Modify line 370 (formerly 369) accordingly:

assign tx_fifo_pop_not_empty = tx_fifo_pop && !tx_fifo_empty;

3/ Insert these two lines after line 426 ( formerly 425 )

`ifndef ALTERA_JTAG_UART assign tx_fifo_pop = txd_state == TXD_STOP3 && tx_bit_pulse == 1'd1;

4/ Finally, add these lines after line 720 ( formerly 717 )

`else

ifdef AMBER_SIM_CTRL reg r_ena = 1'b0; always@( posedge i_clk ) r_ena <= ~r_ena; // dummy stuff for simulation assign rx_fifo_push = 1'b0;else wire t_pause; wire r_ena;
alt_jtag_atlantic jtag_uart_alt_jtag_atlantic ( .clk (i_clk), .r_dat (tx_byte), // <- data to send .r_ena (r_ena), // -> allow to send data .r_val (r_val), // <- data is valid .rst_n (1'b1), .t_dat (rx_byte), // -> received data .t_dav (~rx_fifo_full), // <- data can be sent .t_ena (rx_fifo_push), // -> data is sent .t_pause (t_pause) );

defparam jtag_uart_alt_jtag_atlantic.INSTANCE_ID = 0, // 0 for first instance, 1 for second instance
         jtag_uart_alt_jtag_atlantic.LOG2_RXFIFO_DEPTH = 6,
         jtag_uart_alt_jtag_atlantic.LOG2_TXFIFO_DEPTH = 6,
         jtag_uart_alt_jtag_atlantic.SLD_AUTO_INSTANCE_INDEX = "YES";

endif //AMBER_SIM_CTRL reg r_val; assign tx_fifo_pop = r_val; always@( posedge i_clk ) r_val <= ~tx_fifo_empty & r_ena;endif //ALTERA_JTAG_UART

5/ That's all folks! And there is no modification on software side... Don't forget to define ALTERA_JTAG_UART in your verilog compiler settings.

6/ Invoking nios2-terminal Open the nios2-shell ( menu ALTERA 15.0.0.145 Web Edition -> NIOS II EDS 15.0.0.145 -> NIOS II 15.0 Command Shell ) and type 'nios2-terminal'. If you have compiled your design with the 'boot-loader-serial' application, you are then able to send commands and see messages.

Cyril

Some parts of code were eaten by the editor:

`else

ifdef AMBER_SIM_CTRL reg r_ena = 1'b0; always@( posedge i_clk ) r_ena = ~r_ena; // dummy stuff for simulation assign rx_fifo_push = 1'b0;else wire t_pause; wire r_ena;
alt_jtag_atlantic jtag_uart_alt_jtag_atlantic ( .clk (i_clk), .r_dat (tx_byte), // data to send .r_ena (r_ena), // allow to send data .r_val (r_val), // data is valid .rst_n (1'b1), .t_dat (rx_byte), // received data .t_dav (~rx_fifo_full), // data can be sent .t_ena (rx_fifo_push), // data is sent .t_pause (t_pause) );

defparam jtag_uart_alt_jtag_atlantic.INSTANCE_ID = 0, // 0 for first instance, 1 for second instance
         jtag_uart_alt_jtag_atlantic.LOG2_RXFIFO_DEPTH = 6,
         jtag_uart_alt_jtag_atlantic.LOG2_TXFIFO_DEPTH = 6,
         jtag_uart_alt_jtag_atlantic.SLD_AUTO_INSTANCE_INDEX = "YES";

endif //AMBER_SIM_CTRL reg r_val; assign tx_fifo_pop = r_val; always@( posedge i_clk ) r_val = ~tx_fifo_empty & r_ena;endif //ALTERA_JTAG_UART