Jan 19, 2016Correcting descriptions. I had long time finished random test "Sufle". now test is about 816 not 583.fernandes, felipe
Jan 14, 2016Correct address to github accessfernandes, felipe
Mar 9, 2015Hello guys, I'm updating the page and stating that due to problems in svn in OpenCores I'm providing updates on github so that the work does not stop. fernandes, felipe
Feb 11, 2015updating information about synthesis / area / frequency.fernandes, felipe
Feb 10, 2015updating description with details about PLI/VPI environment created to valid RTL. fernandes, felipe
Feb 10, 2015Im updating Description with brief about AES CORE. More updates till end of the day. fernandes, felipe
Feb 8, 2015Description change. fernandes, felipe
Feb 6, 2015 fernandes, felipe
Feb 6, 2015Description only.fernandes, felipe
Feb 6, 2015Editing Descriptions.fernandes, felipe
Feb 6, 2015Hello everyone, I would like to inform that the check is almost done, just missing detail for better understanding. I will update in the next days more about the project with some criteria that OpenCores requires to have certification. There is a case called souffle in the test and this is a complement of all tests made so far will not be as laborious but by the end of this month I believe I'll have something to put here.fernandes, felipe
Jan 21, 2015correction: Both RTL code and verification environment are in beta; left datatype cases tests on environment.fernandes, felipe
Jan 21, 2015Environment updated tests check information using known values. RTL updated according to correct some data unreadable. Both RTL code and verification environment are missing in beta test cases involving datatype.fernandes, felipe
Jan 8, 2015Bugs fixesfernandes, felipe
Oct 24, 2014Hello people !!! I warn that the test cases for the CBC / CTR modes are ready, missing validation Designer for verilog. I'll start posting some BUGS I found during the test of establishing and AES128. I apologize for creating BUGS CBC decryption is incomplete on the keyboard had a problem and he submitted before I was finished it up. Maybe after this screening errors I can pass the RTL for beta, but nothing is certain yet.fernandes, felipe
Oct 20, 2014 Hello, I would like to update the people who follow our work with the following updates: - Adding an environment of specific tests for each mode of actions - Two possible bugs reported and waiting to be corrected or corrections for best exemplified in the environment / Design - The functions are only for the ECB FIPS mode, I still hope to start this week for the modules CBC / CTR with FIPS tests - The documentation is still being structured and have not yet set a date for the design to post here but I need to confirm if I can post the reference part of the IP in question was based for creating this.fernandes, felipe
Sep 9, 2014Hello everyone; wanting to contribute to the learning of microelectronic here in opencores we are launching today plus a complete IP by our group here on the site. Of course it is still a stable version some things still need to be tested. So we have everyone's patience. The documentation is still being made but now we are putting the rtl for future corrections.fernandes, felipe