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"ret" bug #5
Open markkknd opened this issue almost 17 years ago
markkknd commented almost 17 years ago

In my simulation,I found the instruction pair of "rcall" and "ret" has some bugs. In Modelsim,after "rcall" the fuction, the instruction "ret" make the "pc" back to 0x0000, not the position after the "rcall" in the program. In "AVR studio" ,there is not this problem. I have not analysed the source code carefully now, And I'll do it later. Hope your reply! Thank you! Yours Mark 2008.2.27.

dave.webb8211 commented over 16 years ago

Hi Mark,

I just implemented the core on an Altera FPGA. I was able to compute some Fibanacci numbers using a recursive algorithm (this involves lots of rcall and ret). My design behaved well in the simulator and on target hardware. Have you done further investigations?

Otherwise I think the bug can be closed know.

Kind regards

Dave

rasmus_olsen commented over 16 years ago

Can you publish the source for the code that are producing the bug?

ocghost commented about 16 years ago

I am having the same problem with CALL. When a RET occurs the PC resets to 0000. Have you got any solution Mark?

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