AVR Core

Can you please tell that the AVR core you have designed is cycle accurate or not. Please see the following code NOP NOP JMP RESET Increment: INC R18 NOP NOP NOP RET

RESET: LDI R16,1 LDI R17,2 ADD R16,R17 NOP NOP

When the first JMP occurs; the first instruction is LDI R16,1 but it takes 3 more cycle to execute it. If you compare it with AVR Studio this is not the case. In actual it has to consume 3 cycles to execute JMP instruction only. I have added NOPs before LDI but still LDI takes 3 cycles. Any explanation??? Regards