AVR Core

reg_rd_in : out std_logic_vector (7 downto 0); reg_rd_out : in std_logic_vector (7 downto 0); reg_rd_adr : out std_logic_vector (4 downto 0); reg_rr_out : in std_logic_vector (7 downto 0); reg_rr_adr : out std_logic_vector (4 downto 0); reg_rd_wr : out std_logic;