CAN Protocol Controller

This core needs documentation to tell the designer how to use it. At the very least, the following things should be documented:

1) A description of each top-level port. What is the difference between "clk_i" and "wb_clk_i". Can they be connected to the same clock? What is their relationship? 2)A register map for the internal registers for the core. 3)A description of each file.
4)There should also be sample synthesis and simulation scripts. 5)Instructions for how to integrate the core and get it working as part of a bigger design. How do I know what value to load into the prescaler register? What other registers do I need to read or write? How does the interrupt work? When does it go active?

This is just the tip of the iceberg and all of this is very important. The core is nearly useless without at least some basic documentation.

For documentation take SJA1000 from Philips.

For documentation take SJA1000 from Philips.