cpu6502_tc - R6502 Processor Soft Core with accurate timing

1. After removing some unused nets and registers, the whole design was optimized. So the signal "rd_o" was corrupted while this action. I use only signal "wr_n_o" to control the read/write flow for my FPGA-APPLE][+. In result of this, the error was not occour at the produktion test.

I noticed this error by the way by doing some simulations for the next point.

2. OP "JMP (indirect)" produced a 65C02 like jump. On 6502 a special case exist when the "(indirect)" address cross the page boundary (e.g. "JMP (02FF)" reads from $02FF and $0200, instead of $02FF and $0300)