cpu6502_tc - R6502 Processor Soft Core with accurate timing

ALL branches - incorrect timing if a forward branch occurs #7

Closed fpga_is_funny opened this issue about 6 years ago

All Branch Instructions (BCC, BCS, BEQ, BNE, BPL, BMI, BVC, BVS) 4 cycles if branch forward occur and the branch instruction lies on a xxFEh location. Must be 3 cycles course it is a SAME PAGE Branch.