8080 Compatible CPU

These versions of the design have a typo in the STAX instruction:

if (opcode4) // use DE pair waddrhold <= regfil`reg_d<<8|regfil`reg_d;

reg_d is used twice.

Same problem in LDAX a few lines down.

Another typo in m8080.v:

              // the illegal opcodes behave as NOPs

              6'b001011, 6'b011001, 6'b011101, 6'b101101, 
              6'b111101: begin

                 state <= `cpus_fetchi; // fetch next instruction
                 pc <= pc + 2'b10; // Next instruction byte, cns 2

              end

								The PC is incremented wrong.