OpenCores

Hardware

- Analog I/O (planning) - Two fully balanced inputs and outputs - THD+N... > 95dB@-1dBFS - Level..... +20dBu (max) - DR......... > 110dB (A weighted.) - Input impedance 5kohm (balanced) - Output impedance 100ohm (balanced) - 25 pin D-SUB high-density connector (AES recommended pinout) - Digital I/O (planning) - One input and one output (both with two channels) - Transformer isolated. - AES3 (AES/EBU) compatible - SP/DIF compatible (coaxial, with adapter) - Bit depth 8, 16, 24, 32 bits (ADC/DAC will work with 24bit depth maximum) - Sample rates up to 200kHz (scalable and/or standard rates) - (Another) 25 pin D-SUB high-density connector. This connector also will be used for balanced MIDI interfaces. - ADC, DAC, DIT and DIR (planning) - It will be the best to have chips that are available in small quantitites from vendors such as DigiKey, Newark, NuHorizons... - Chip manufacturers will be Cirrus, TI, AKM (very hard to buy a piece) or Analog Devices - NOTE: If anyone interested for building Open Core AES3 and SP/DIF interface, DIR and DIT chips are not needed, and only high speed RS485 (RS422) transformer isolated interfaces will be implemented. Suggestions? (Please visit http://www.aes.org/ for information about AES3 and SP/DIF interfaces). - Clock and synchronization (planning) - One analog PLL for wide lock range (TI tlc2932) - One (cheap?) VCXO for fpga based digital pll (or one expensive VCXO with compatible pinout... quality VCXOs are expensive parts.). Suggestions? - AES recommendation for audio/video synchronization is very hard (or better, expensive) for realization, named as DARS class 1 and class 2, and then this feature will be discussed. (Please visit http://www.aes.org/ for information about DARS specification). - MIDI (planning) - Balanced input and output. - UART will be implemented in FPGA. - Onboard memory (planning) - 64Mbytes SDRAM (min, 32bits wide, 133MHz, soldered) - 512kbytes Flash (min, 8bits wide, soldered) - Socket for flash/prom (Xilinx configuration) - 32kbytes serial EEPROM (min, soldered) - PCI (planning) - Standard, FPGA based, 33MHz interface. - FPGA (planning) - Xilinx XC2S200 (BGA or QFP) - FPGA Configuration will be possible with Xilinx Parallel Cable III or IV (JTAG) or Flash/PROM. - Flash/PROM configuration will be possible with Xilinx Parallel Cable III or IV (JTAG). - FPGA Debugging - JTAG - Connector for logic analyzer (suggestions?) NOTES - All parts will be available for buying in small quantities from DigiKey, NuHorizons, Newark,... (planning) - Note also that high quality ADCs and DACs are not cheap parts (possibly more than 25$ for one piece), but overall price of this board will be comparable with commercially available boards with similar performances. Commercial boards have not schematic drawing nor rich documentation publically available for building device drivers and applications. In most cases you must sign an NDA for obtain such documentation, but that is not enough for overall hardware and software quality (IMHO) . - Very few commercially available "high-end" audio cards have their listed performances in real environment. - Only high-end Do-It-Yourself design solutions will have costs comparable to price of comercialy available similar products. DIY designs with "consumer" grade components will be too expensive in most cases, because you will buy working product in local shop for 15-30% overall components price used in, and with bunch of probably useless software but with drivers, etc. In this case, "my preciousssss.... card" will be only one reason for home build consumer grade card. - Common practice of most audio card manufacturers is to cite numbers and figures from the chip manufacturer's datasheets despite the fact that it is hard to obtain such a performances in noisy environments like standard PC, or any other... - It will be possible to implement any needed Open Core to this card (PCI core, FIR, SDRAM controller, UART for MIDI, Flash Controller, etc...) - It's possible to build high performance audio card for old noisy PC, but this is neither simple nor cheap task. - It will be possible to "Do It Yourself" this card, and we wiill try to prepare instructions and web resources for explanation how to do this.