Multiplierless 64 point FFT Processor

Description

This 64 point FFT processor was developed to power an OFDM engine targeted at 802.11a. The FFT Processor eliminates the use of a multiplier by relying on the knowledge that 802.11a requires 64 point FFT only. The 32 twiddle factors in a 64 point FFT are known, and can be derived from 10 unique constants. A presentation describing the architecture and optimizations is available at here

Multiplication with a constant is achieved by using a combination of shifters and adders. The 32 twiddle factors of the 64 point FFT are reduced to 10 unique constants. These 10 constants are arranged in a cascaded manner with 7 in the first bank, followed by 3 in the second. Multiplexers control the combination of constants from multiplier bank 1 and 2 for any given calculation throughout the 64 point FFT computation. Future work may include adding a wishbone wrapper for interfacing with the processor, and adding Cyclic Prefixing to complete a full OFDM engine.