Al-Eryani, Jidan

the addition unit correctly computes
-0 + (-0) = -0
but in the subtraction unit, the corresponding case wrongly gets +0:
-0 - (+0) = +0
signal values:
fpu_op_i 1
opa_i 8000000
opb_i 0000000
rmode_i 0
output_o 00000000, but should be 8000000

bug in subtraction with signed 0

I can see that multiplying a NaN with a number delivers a NaN (which is expected), but it also raises both overflow and inexact flags which is not expected.
Concrete example:
fpu_op_i 2
opa_i    fffd3b35
opb_i    407ad880
rmode_i  0

overflow_o 1
ine_o      1

bug related to NaN multiplication

Hello, 

I found a discrepancy with soft float result for the following input vector : 
rmode = 0 
op = 10 ( multiply) 
opa = 0xc1800300 
opb = 0x00034000 

The soft float result is 0x80340138 
fpu100 result : 0x80068027 

Please debug if this is still possible. 

-JIang

discrepancy with soft float on multiply

Hello,

I found a discrepancy with soft float result for the following input vector :
rmode = 0
op = 10 ( multiply)
opa = 0xc1800300
opb = 0x00034000

The soft float result is 0x80340138 
fpu100 result : 0x80068027

Please debug if this is still possible.

-JIang

multiplier bug

When OPA = 80000000 , OPB = 80000000 and the opcode is 011 (which is divide) it doesnt' function correctly. Atleast the testbench errors out.

For my study, I've screened out this particular instruction and the rest pass.

Thanks,
Senthil

Divide Instr Fail

The MULT unit does not have the outputs registered. Infact there is code to register, but is commented out. I tried uncommenting and running the tests, they fail miserably :-(

Could you please look into it, this could have PnR impact

Thanks,
Senthil

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