Lightweight 8051 compatible CPU
News
| Dec 6, 2013 | Fixed long-standing bug. | A. Ruiz, José |
| Feb 3, 2013 | Interrupt management refactored to be 100% compatible to original | A. Ruiz, José |
| Jan 28, 2013 | CPU self-test code modified to try IRAM and SFR addresses in direct mode | A. Ruiz, José |
| Jan 28, 2013 | Updated front page after fixing bug in DJNZ | A. Ruiz, José |
| Nov 27, 2012 | Simplified front page text. | A. Ruiz, José |
| Nov 27, 2012 | Fixed absolute path in Quartus-2 project file. | A. Ruiz, José |
| Nov 24, 2012 | Tidying up the front page. | A. Ruiz, José |
| Nov 24, 2012 | Updated synthesis results on Spartan-3A. | A. Ruiz, José |
| Nov 24, 2012 | Added bug report notice for XCODE BRAM synthesis in XST. | A. Ruiz, José |
| Nov 23, 2012 | Added 'FPGA proven' attribute to the core description. | A. Ruiz, José |
| Nov 23, 2012 | Updated perfoemance data for Spartan-3. | A. Ruiz, José |
| Nov 23, 2012 | Added synthesis results for Spartan-3 chips. | A. Ruiz, José |
| Nov 23, 2012 | Minor fix to front page text. | A. Ruiz, José |
| Nov 23, 2012 | Completion of first version of front page. | A. Ruiz, José |
| Nov 23, 2012 | Added some basic information to the project front page. | A. Ruiz, José |
| Nov 23, 2012 | First draft of front page. No sources committed yet. | A. Ruiz, José |
© copyright 1999-2018 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.