100 MB/s Ethernet MAC Layer Switch
Project maintainers
Details
Name: mac_layer_switch
Created: Mar 9, 2014
Updated: May 25, 2014
SVN Updated: Jun 19, 2014
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 1 reported / 0 solved
Created: Mar 9, 2014
Updated: May 25, 2014
SVN Updated: Jun 19, 2014
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 1 reported / 0 solved
Star6you like it: star it!
Other project properties
Category:Communication controller
Language:Verilog
Development status:Mature
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL
Language:Verilog
Development status:Mature
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL
Description
Ethernet MAC Layer Switch.
The switch receive 100 MB/s data rate from 6
channels and direct each frame received to its destination port.
The switch is designed with :
1. Simultaneously Read / Write frames memory - to improve latency
2. Digital serialize / De - Serialize and digital routing core
The Simulation include testbench of 6 Network Adapters (NIC Hosts)
transmitting 100 MB/s data to the switch.
NiC hosts are teken from the eth ip core projects as benchmarks( may be modified).
© copyright 1999-2018 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.