Serial Uart
about the two clocks in the design #2
Open lal87 opened this issue over 14 years ago
lal87 commented over 14 years ago
Sir, I want to use your UART project to send some data from FPGA to PC via RS 232 bus. I am confused about the two clocks in the design. As per the documentation I am using BR_Clk_I at 10 MHZ for baud rate of 38400. But what clock should I put for WB_CLK_I.Is this clock completely independent of the BR_CLK_I?
Also I couldnt get any information about the following ports in the documentation. WB_STB_I and WB_ACK_O. Can you please explain their use?
© copyright 1999-2018 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.