OpenCores

Non Linear Pseudo Random Generator

Project maintainers

Details

Name: nlprg
Created: Apr 18, 2020
Updated: Apr 28, 2020
SVN Updated: Apr 28, 2020
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
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Other project properties

Category:Arithmetic core
Language:Verilog
Development status:Mature
Additional info:
WishBone compliant: No
WishBone version: n/a
License: Others

NLPRG

This project provides an example of a non-linear pseudo random generator ( nlprg ). The nlprg can produce a pseudo-random sequence with a period of 2^n numbers, where n is the numbers of registers. For more information an circuit examples visit my blog at https://fdblog.xyz/circuits/non-linear-pseudo-random-generator-introduction/

The nlprg implementations in this repository range from 3 to 16 bits.

In the rtl folder you will find all the rtl nlprg implementations, in the tb folder you will find all the testbenches, in the doc folder there are all the circuit shematics and in the dig folders all the dig files used to generate the rtl. The tool used is Digital by Hneemann, you can find it at this link https://github.com/hneemann/Digital.

The simulation stores the generated sequence in the tb/log and the waveforms in tb/wave.

Please feel free to contact me at fd@francescodellanna.xyz, I will be happy to help.