In this FPGA implementation, the PDP-8 CPU can be configured to emulate the instruction execution of a PDP-8 (Straight-8), PDP-8/S, PDP-8/S, PDP-8/I, PDP-8/L, PDP-8/E/F/M, PDP-8/A, HD-6100, or a HD-6120.
The CPU does not attempt to emulate the execution of any particular PDP-8 implementation. The clock rate is different, the number of clock cycles per instruction is different, and the bus implementation is different.
Just for fun, the CPU incorporates a single cycle multiplier and a single cycle barrel shifter (currently disabled).
The system includes 32K-Words of memory. Unlike normal RAM memory, the FPGA memory can be initialized at power-up. The memory is in this system initialized with the RK8E Bootstrap program at location 0023, the BIN Loader at location 7626 and the RIM Loader at 7756.
You can initialize the memory to all zeros if you are old-school and feel the need to use the front panel to toggle-in the boot loaders.
This device provides an interface to the front panel switches and LEDs that were present on the PDP-8/E front panel.
The PDP-8 Extended Arithmetic Element (EAE) provides optional advanced mathematics capabilities. The EAE is used to perform 23-bit floating-point and 24-bit integer operations. The EAE provides 24-bit add, subtract, load, store, multiply, divide, normalize, increment, complement, shift, and rotate instructions.
The KE8 EAE can be disabled.
The basic PDP-8 architecture provided a 4K-word address space. The KM8E provides a memory extension mechanism that allows the PDP-8 address 32K-words of memory.
The KM8E Extended Memory can be disabled.
The KM8E time-sharing mechanism allows the CPU to operate in either Executive Mode or User Mode. In User Mode, instructions that could effect the operation of another program generate a User Mode Interrupt so that the operating system can handle the instruction correctly.
The KM8E Time Sharing can be disabled.
The Real Time Clock (RTC) is used to create periodic interrupts to the processor. The RTC can be configured to operate in the following modes:
All timing is generated from the on-board crystal oscillator
The system provides two serial interfaces.
The LS8E device provides an interface to a serial printer. The device can provide hardware handshaking or XON/XOFF handshaking with the printer without software support.
The PR8E device provides an interface to a serial paper tape reader such as the Decitek 760. The device can provide hardware handshaking or XON/XOFF handshaking with the paper tape reader without software support.
The Disk Controller is designed to 'front end' a Secure Digital disk chip which behaves as if it were four RK05 Disk Drives. The disk format is the same as SIMH so all of the SIMH disk images may be reused without change.