OpenCores
This page contains files uploaded to the old opencores website as well as images and documents intended for use on other pages in this project. If you want to download this project or browse its svn, you can do so at the overview-page.
DateFileDescription
2008-09-30 19:57SRAM_controler.vThis is the controller for the 16 SRAM modules, with Address translate it could manage the 16 memory chips.
2008-09-30 19:54registers_complex.v32 register for manage important data neede for execute the SCSI commands. it should be accesed by the scsi us and the processor
2008-09-30 18:25Data_buffer.vThis is a simple 8 data bits buffer with 5 bits of depth
2008-09-30 18:13Address_translate.vThis module take the 32 address bits from the processor and tranlate it to a 21 address bit for 16 SRAM memories with their specific chipselect pins