How do you do? My name is k.degawa.
It is reported because bug was found.
Timing is different with the original and T8039. They are RDn and PSENn.(EA = 1)
original > PSENn ------___---- ---------------- RDn ------------------------___---
T8039 > 'different' PSENn ------___---- ----___----- RDn ------------------------___---
Bug report is confirmed: PSENn is erroneously activated during read or write from external memory when the read and write strobe signals RDn and WRn are active. This happens when code is executed from external Program Memory. Affected releases 0.1 BETA, 0.2 BETA, 0.3 BETA
The problem lies in the decoder module where the PSENn signal is generated based on the current machine cycle.
Fixed in decoder.vhd 1.15 Added waveform check for PSENn in if_timing.vhd 1.3 New regression test: white_box/psen_rd_wr_timing Fix will be included in next release.
Bug report is confirmed: PSENn is erroneously activated during read or write from external memory when the read and write strobe signals RDn and WRn are active. Affected releases 0.1 BETA, 0.2 BETA, 0.3 BETA
The problem lies in the decoder module where the PSENn signal is generated based on the current machine cycle.
Fixed in decoder.vhd 1.15 Added waveform check for PSENn in if_timing.vhd 1.3 New regression test: white_box/psen_rd_wr_timing Fix will be included in next release.
I downloaded T48 core(beta0.4). Then. I confirmed improvement. Your T48 core is perfect working in FPGA-DonkeyKong. Thank you very much.