Am utilising a couple of TV80 cores. Using ancient code written back in the 80s where INT is not cleared by M1 / iorq but persists until cleared by a write late in the ISR. If an NMI occurs during this time (i.e. INT lo) the vector for the NMI (0x66) is pushed to the stack as if it were the next instruction address and the code is vectored to 0x0038 i.e. it reenters the ISR it is already in. Interesting!
Closing duplicate bug