TV80
TV80 INT NMI interaction #2
Closed davestevens opened this issue over 14 years ago
davestevens commented over 14 years ago
Am utilising a couple of TV80 cores. Using ancient code written back in the 80s where INT is not cleared by M1 / iorq but persists until cleared by a write late in the ISR. If an NMI occurs during this time (i.e. INT lo) the vector for the NMI (0x66) is pushed to the stack as if it were the next instruction address and the code is vectored to 0x0038 i.e. it reenters the ISR it is already in. Interesting!
ghutchis was assigned over 14 years ago
ghutchis commented over 14 years ago
I am trying to reproduce this in simulation but am unable to so far. Testbench needs to be enhanced to support mode 2 interrupts.
ghutchis closed this almost 14 years ago
ghutchis commented almost 14 years ago
This bug has been found and fixed.
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