TV80

The zero flag and negative flag are not set properly when a LD A,R or LD A,I instruction is executed. The test case for this had been removed. Upon properly setting the flags, the test cases work correctly.

See pages 98 and 99 of Zilog Z80 User Manual UM008001-1000

tv80_core.v @734 if (Special_LD2 == 1'b1 ) begin case (Special_LD1:0) 2'b00 : begin ACC <= #1 I; FFlag_P <= #1 IntE_FF2; // Joe FFlag_Z <= (I == 0); FFlag_S <= I7; FFlag_H <= 0; FFlag_N <= 0; // END JOE end

                    2'b01 :
                      begin
                        `ifdef TV80_REFRESH
                        ACC <= #1 R;
                        `else
                        ACC <= #1 0;
                        `endif
                        F[Flag_P] <= #1 IntE_FF2;
                        // Joe
                        F[Flag_Z] <= (I == 0);
                        F[Flag_S] <= I[7];
                        F[Flag_H] <= 0;
                        F[Flag_N] <= 0;
                        // END JOE
                      end

Added user provided code for LD A,I and LD A,R instruction, created new testcase ivec_flags.ast to test behavior of opcocdes.