OpenCores

Project maintainers

Details

Name: upcable
Created: Oct 5, 2004
Updated: Dec 3, 2004
SVN Updated: Mar 10, 2009
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
Star1you like it: star it!

Other project properties

Category:Other
Language:Verilog
Development status:
Additional info:FPGA proven
WishBone compliant: No
WishBone version: n/a
License:

Status

- Found the old project files and documentation and uploaded to opencores
- PCB with XC9536XL 90% done, may go into new PCB rev
- Several configurations have been tested with an prototype

Description

The goal was to create a set of HDL designs that can convert a small PLD to emulate any JTAG/ISP/Download cable. In most cases those designs are pretty trivial.

All (almost all) current testing is now done using Chameleon dongle from http://www.amontec.com

Features

- Emulated Cables
- ByteBlasterMB/II
- Xilinx Parallel Cable III
- Atmel ATDH2081
- Atmel STK200
- JTAG Wiggler
- Cypress UltraISR Cable
- LVTP (Low Voltage Trival PIC Programmer)
- TI MSP JTAG Cable