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Public Profile of ful, chenglogn
Info
Username
chenglong
Fullname
ful, chenglogn
Email
chenglong@openco... (@opencores.org)
Country
China
Starred projects
5
AXI DMA 32 / 64 bits
Classic 5-Stage Pipeline MIPS
16-bit SDRAM Controller
32 bit Processor
2D FHT
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