| Rev |
Log message |
Author |
Age |
Path |
| 202 |
Add DMA interface support + LINT cleanup |
olivier.girard |
3282d 13h |
/openmsp430/trunk/core/ |
| 200 |
Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains. |
olivier.girard |
3443d 12h |
/openmsp430/trunk/core/ |
| 192 |
Number of supported IRQs is now configurable to 14 (default), 30 or 62. |
olivier.girard |
3843d 14h |
/openmsp430/trunk/core/ |
| 190 |
Remove dummy memory read access for CMP and BIT instructions. |
olivier.girard |
3983d 14h |
/openmsp430/trunk/core/ |
| 188 |
Add missing include commands for the define and undefine files in the wakeup_cell and in dbg_i2c. |
olivier.girard |
3995d 13h |
/openmsp430/trunk/core/ |
| 186 |
Fixed Hardware Multiplier byte operations bug: http://opencores.org/bug,assign,2247 |
olivier.girard |
4096d 14h |
/openmsp430/trunk/core/ |
| 180 |
Add new ASIC_CLOCKING configuration option to allow ASIC implementations with FPGA clocking scheme.
Thanks to Sebastien Van Cauwenberghe's contribution :-) |
olivier.girard |
4138d 13h |
/openmsp430/trunk/core/ |
| 178 |
Update all linker scripts with a simplified version.
Thanks to Mihai M. for this one :-) |
olivier.girard |
4147d 12h |
/openmsp430/trunk/core/ |
| 175 |
Update hardware breakpoint unit with the followings:
- fixed hardware breakpoint bug with CALL instructions.
- modified data read watchpoint behavior to also trigger with read/modify/write instructions.
- removed unused ports. |
olivier.girard |
4164d 13h |
/openmsp430/trunk/core/ |
| 174 |
Cleanup dmem_wr generation logic. Important note: this is not a bug fix, only beautification. |
olivier.girard |
4164d 13h |
/openmsp430/trunk/core/ |
| 154 |
The serial debug interface now supports the I2C protocol (in addition to the UART) |
olivier.girard |
4271d 13h |
/openmsp430/trunk/core/ |
| 151 |
Add possibility to configure custom Program, Data and Peripheral memory sizes. |
olivier.girard |
4356d 12h |
/openmsp430/trunk/core/ |
| 149 |
Update simulation regression result parser.
Fixed failing SFR test (due to newer MSPGCC version).
Implement request http://opencores.org/bug,view,2171 (burst accesses through the serial debug interface) |
olivier.girard |
4359d 14h |
/openmsp430/trunk/core/ |
| 145 |
Add Dhrystone and CoreMark benchmarks to the simulation environment. |
olivier.girard |
4409d 13h |
/openmsp430/trunk/core/ |
| 142 |
Beautify the linker script examples. |
olivier.girard |
4430d 14h |
/openmsp430/trunk/core/ |
| 141 |
Update verification environment to support MSPGCC Uniarch (based on GCC 4.5 and later) |
olivier.girard |
4434d 13h |
/openmsp430/trunk/core/ |
| 139 |
Add some SVN ignore patterns |
olivier.girard |
4446d 23h |
/openmsp430/trunk/core/ |
| 138 |
Update simulation scripts to support Cygwin out of the box for Windows users. |
olivier.girard |
4446d 23h |
/openmsp430/trunk/core/ |
| 134 |
Add full ASIC support (low-power modes, DFT, ...).
Improved serial debug interface reliability. |
olivier.girard |
4478d 13h |
/openmsp430/trunk/core/ |
| 132 |
Update FPGA examples with the POP.B bug fix |
olivier.girard |
4491d 13h |
/openmsp430/trunk/core/ |
| 130 |
Fixed POP.B bug (see Bugtracker http://opencores.org/bug,assign,2137 ) |
olivier.girard |
4499d 12h |
/openmsp430/trunk/core/ |
| 128 |
Fixed CALL x(SR) bug (see Bugtracker http://opencores.org/bug,view,2111 ) |
olivier.girard |
4575d 13h |
/openmsp430/trunk/core/ |
| 122 |
Add coverage report generation (NCVERILOG only)
Add support for the ISIM Xilinx simulator. |
olivier.girard |
4647d 13h |
/openmsp430/trunk/core/ |
| 117 |
To facilitate commercial adoption of the openMSP430, the core has moved to a modified BSD license. |
olivier.girard |
4751d 14h |
/openmsp430/trunk/core/ |
| 115 |
Add linker script example. |
olivier.girard |
4776d 14h |
/openmsp430/trunk/core/ |
| 112 |
Modified comment. |
olivier.girard |
4784d 13h |
/openmsp430/trunk/core/ |
| 111 |
Re-organized the "openMSP430_defines.v" file.
Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning).
Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000).
As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly. |
olivier.girard |
4785d 13h |
/openmsp430/trunk/core/ |
| 106 |
Separated the Timer A defines from the openMSP430 ones.
Added the "dbg_en" port in order to allow a separate reset of the debug interface.
Added the "core_en" port (when cleared, the CPU will stop execution, the dbg_freeze signal will be set and the aclk & smclk will be stopped).
Renamed "per_wen" to "per_we" to prevent confusion with active low signals.
Removed to missing unused flops when the DBG_EN is not defined (thanks to Mihai contribution). |
olivier.girard |
4841d 12h |
/openmsp430/trunk/core/ |
| 105 |
Removed dummy memory read access for the MOV/PUSH/CALL/RETI instructions.
These were not problematic but this is simply cleaner that way. |
olivier.girard |
4856d 13h |
/openmsp430/trunk/core/ |
| 103 |
Removed the timescale from all RTL files.
Added possibility to exclude the "includes" statements from the RTL. |
olivier.girard |
4861d 19h |
/openmsp430/trunk/core/ |
