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Rev Log message Author Age Path
212 Update all FPGA project examples to support both MSPGCC and TI/RedHat GCC toolchains. olivier.girard 3194d 12h /
211 Add custom printf function to reduce program memory footprint (the TI/RH GCC version is huge). Note that this function was created by DJ Delorie ( http://www.delorie.com/ ) olivier.girard 3194d 12h /
210 Add support for both MSPGCC and TI/RH-GCC toolchains. Add detection of debug ports for OS-X. olivier.girard 3194d 13h /
209 Update ChangeLogs olivier.girard 3222d 02h /
208 Update tools to run with latest CPU core version. olivier.girard 3222d 02h /
207 Simulation now works seamlessly under Linux, OS-X and Windows (Cygwin) olivier.girard 3222d 02h /
206 Update ChangeLog olivier.girard 3319d 02h /
205 Thanks again to Johan W. good feedback, the following updates are implemented:
- Change code to fix delta cycle issues on some simulators in mixed VHDL/Verilog environment.
- Update oscillators enable generation to relax a critical timing paths in the ASIC version.
- Add option to scan fix inverted clocks in the ASIC version (disabled by default as this is supported by most tools).		 olivier.girard 3319d 02h /
204 Fix DMA interface RTL merge problem (defines got wrong values). Fix CDC issue with the timerA (thanks to Johan for catching that). olivier.girard 3326d 02h /
203 Update ChangeLog olivier.girard 3333d 02h /
202 Add DMA interface support + LINT cleanup olivier.girard 3333d 02h /
201 Update ChangeLog olivier.girard 3494d 01h /
200 Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains. olivier.girard 3494d 01h /
199 Update ChangeLog olivier.girard 3600d 03h /
198 Update GDB-Proxy to support new GCC/GDB compiler version from RedHat/TI olivier.girard 3600d 03h /
197 Fixed bug on the write strobe of the baudrate hi configuration register. olivier.girard 3851d 02h /
196 Update ChangeLog olivier.girard 3894d 02h /
195 Update HTML documentation with configurable number of IRQ option. olivier.girard 3894d 02h /
194 Update PDF and ODT documentation. olivier.girard 3894d 03h /
193 Update FPGA projects with latest core RTL changes. olivier.girard 3894d 03h /
192 Number of supported IRQs is now configurable to 14 (default), 30 or 62. olivier.girard 3894d 03h /
191 Update ChangeLog olivier.girard 4034d 02h /
190 Remove dummy memory read access for CMP and BIT instructions. olivier.girard 4034d 03h /
189 Update ChangeLog olivier.girard 4046d 02h /
188 Add missing include commands for the define and undefine files in the wakeup_cell and in dbg_i2c. olivier.girard 4046d 02h /
187 Update ChangeLog olivier.girard 4147d 03h /
186 Fixed Hardware Multiplier byte operations bug: http://opencores.org/bug,assign,2247 olivier.girard 4147d 03h /
185 Update Altera FPGA example bitstream (no functional change... only generated with a newer Quartus version) olivier.girard 4148d 03h /
184 Fixed some project settings for newer Quartus version (12.1) olivier.girard 4148d 03h /
183 Update ChangeLog olivier.girard 4189d 01h /

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