URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430] - Rev 211

Rev	Log message	Author	Age	Path
191	Update ChangeLog	olivier.girard	4014d 01h	/openmsp430
190	Remove dummy memory read access for CMP and BIT instructions.	olivier.girard	4014d 01h	/openmsp430
189	Update ChangeLog	olivier.girard	4026d 01h	/openmsp430
188	Add missing include commands for the define and undefine files in the wakeup_cell and in dbg_i2c.	olivier.girard	4026d 01h	/openmsp430
187	Update ChangeLog	olivier.girard	4127d 01h	/openmsp430
186	Fixed Hardware Multiplier byte operations bug: http://opencores.org/bug,assign,2247	olivier.girard	4127d 01h	/openmsp430
185	Update Altera FPGA example bitstream (no functional change... only generated with a newer Quartus version)	olivier.girard	4128d 02h	/openmsp430
184	Fixed some project settings for newer Quartus version (12.1)	olivier.girard	4128d 02h	/openmsp430
183	Update ChangeLog	olivier.girard	4169d 00h	/openmsp430
182	Minor update to reflect new ASIC_CLOCKING option.	olivier.girard	4169d 00h	/openmsp430