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Rev Log message Author Age Path
194 Update PDF and ODT documentation. olivier.girard 3839d 00h /
193 Update FPGA projects with latest core RTL changes. olivier.girard 3839d 00h /
192 Number of supported IRQs is now configurable to 14 (default), 30 or 62. olivier.girard 3839d 00h /
191 Update ChangeLog olivier.girard 3979d 00h /
190 Remove dummy memory read access for CMP and BIT instructions. olivier.girard 3979d 00h /
189 Update ChangeLog olivier.girard 3990d 23h /
188 Add missing include commands for the define and undefine files in the wakeup_cell and in dbg_i2c. olivier.girard 3990d 23h /
187 Update ChangeLog olivier.girard 4092d 00h /
186 Fixed Hardware Multiplier byte operations bug: http://opencores.org/bug,assign,2247 olivier.girard 4092d 00h /
185 Update Altera FPGA example bitstream (no functional change... only generated with a newer Quartus version) olivier.girard 4093d 00h /

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