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[/] [openmsp430/] [trunk/] [fpga] - Rev 223

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Rev	Log message	Author	Age	Path
223	Adjust register mapping of FRAME_SELECT	olivier.girard	2812d 17h	/openmsp430/trunk/fpga
222	Update to latest openGFX430 version. Update 2BPP demo.	olivier.girard	2813d 19h	/openmsp430/trunk/fpga
221	Move old Altera-DE1 project to the OBSOLETE directory. Create new Altera-DE0-Nano-SoC project, also containing a small demo of the openGFX430 graphic controller.	olivier.girard	2890d 19h	/openmsp430/trunk/fpga
220	Create OBSOLETE directory to store old FPGA projects	olivier.girard	2890d 20h	/openmsp430/trunk/fpga
212	Update all FPGA project examples to support both MSPGCC and TI/RedHat GCC toolchains.	olivier.girard	3165d 05h	/openmsp430/trunk/fpga
205	Thanks again to Johan W. good feedback, the following updates are implemented: - Change code to fix delta cycle issues on some simulators in mixed VHDL/Verilog environment. - Update oscillators enable generation to relax a critical timing paths in the ASIC version. - Add option to scan fix inverted clocks in the ASIC version (disabled by default as this is supported by most tools).	olivier.girard	3289d 19h	/openmsp430/trunk/fpga
204	Fix DMA interface RTL merge problem (defines got wrong values). Fix CDC issue with the timerA (thanks to Johan for catching that).	olivier.girard	3296d 20h	/openmsp430/trunk/fpga
202	Add DMA interface support + LINT cleanup	olivier.girard	3303d 19h	/openmsp430/trunk/fpga
200	Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains.	olivier.girard	3464d 18h	/openmsp430/trunk/fpga
197	Fixed bug on the write strobe of the baudrate hi configuration register.	olivier.girard	3821d 20h	/openmsp430/trunk/fpga
193	Update FPGA projects with latest core RTL changes.	olivier.girard	3864d 20h	/openmsp430/trunk/fpga
190	Remove dummy memory read access for CMP and BIT instructions.	olivier.girard	4004d 20h	/openmsp430/trunk/fpga
188	Add missing include commands for the define and undefine files in the wakeup_cell and in dbg_i2c.	olivier.girard	4016d 20h	/openmsp430/trunk/fpga
186	Fixed Hardware Multiplier byte operations bug: http://opencores.org/bug,assign,2247	olivier.girard	4117d 20h	/openmsp430/trunk/fpga
185	Update Altera FPGA example bitstream (no functional change... only generated with a newer Quartus version)	olivier.girard	4118d 21h	/openmsp430/trunk/fpga
184	Fixed some project settings for newer Quartus version (12.1)	olivier.girard	4118d 21h	/openmsp430/trunk/fpga
181	Update with latest oMSP Core version.	olivier.girard	4159d 19h	/openmsp430/trunk/fpga
179	Update all linker scripts with a simplified version. Thanks to Mihai M. for this one :-)	olivier.girard	4168d 19h	/openmsp430/trunk/fpga
178	Update all linker scripts with a simplified version. Thanks to Mihai M. for this one :-)	olivier.girard	4168d 19h	/openmsp430/trunk/fpga
176	Update FPGA projects with latest openMSP430 core RTL	olivier.girard	4185d 19h	/openmsp430/trunk/fpga

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[/] [openmsp430/] [trunk/] [fpga] - Rev 223

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