OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430] - Rev 204

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
204 Fix DMA interface RTL merge problem (defines got wrong values). Fix CDC issue with the timerA (thanks to Johan for catching that). olivier.girard 3279d 07h /openmsp430
203 Update ChangeLog olivier.girard 3286d 06h /openmsp430
202 Add DMA interface support + LINT cleanup olivier.girard 3286d 06h /openmsp430
201 Update ChangeLog olivier.girard 3447d 05h /openmsp430
200 Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains. olivier.girard 3447d 05h /openmsp430
199 Update ChangeLog olivier.girard 3553d 08h /openmsp430
198 Update GDB-Proxy to support new GCC/GDB compiler version from RedHat/TI olivier.girard 3553d 08h /openmsp430
197 Fixed bug on the write strobe of the baudrate hi configuration register. olivier.girard 3804d 07h /openmsp430
196 Update ChangeLog olivier.girard 3847d 06h /openmsp430
195 Update HTML documentation with configurable number of IRQ option. olivier.girard 3847d 06h /openmsp430
194 Update PDF and ODT documentation. olivier.girard 3847d 07h /openmsp430
193 Update FPGA projects with latest core RTL changes. olivier.girard 3847d 07h /openmsp430
192 Number of supported IRQs is now configurable to 14 (default), 30 or 62. olivier.girard 3847d 07h /openmsp430
191 Update ChangeLog olivier.girard 3987d 07h /openmsp430
190 Remove dummy memory read access for CMP and BIT instructions. olivier.girard 3987d 07h /openmsp430
189 Update ChangeLog olivier.girard 3999d 07h /openmsp430
188 Add missing include commands for the define and undefine files in the wakeup_cell and in dbg_i2c. olivier.girard 3999d 07h /openmsp430
187 Update ChangeLog olivier.girard 4100d 07h /openmsp430
186 Fixed Hardware Multiplier byte operations bug: http://opencores.org/bug,assign,2247 olivier.girard 4100d 07h /openmsp430
185 Update Altera FPGA example bitstream (no functional change... only generated with a newer Quartus version) olivier.girard 4101d 07h /openmsp430

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.