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[/] [openmsp430/] [trunk/] [core/] - Rev 204

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Rev Log message Author Age Path
204 Fix DMA interface RTL merge problem (defines got wrong values). Fix CDC issue with the timerA (thanks to Johan for catching that). olivier.girard 3258d 13h /openmsp430/trunk/core/
202 Add DMA interface support + LINT cleanup olivier.girard 3265d 13h /openmsp430/trunk/core/
200 Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains. olivier.girard 3426d 12h /openmsp430/trunk/core/
192 Number of supported IRQs is now configurable to 14 (default), 30 or 62. olivier.girard 3826d 14h /openmsp430/trunk/core/
190 Remove dummy memory read access for CMP and BIT instructions. olivier.girard 3966d 14h /openmsp430/trunk/core/
188 Add missing include commands for the define and undefine files in the wakeup_cell and in dbg_i2c. olivier.girard 3978d 13h /openmsp430/trunk/core/
186 Fixed Hardware Multiplier byte operations bug: http://opencores.org/bug,assign,2247 olivier.girard 4079d 14h /openmsp430/trunk/core/
180 Add new ASIC_CLOCKING configuration option to allow ASIC implementations with FPGA clocking scheme.
Thanks to Sebastien Van Cauwenberghe's contribution :-)
olivier.girard 4121d 13h /openmsp430/trunk/core/
178 Update all linker scripts with a simplified version.
Thanks to Mihai M. for this one :-)
olivier.girard 4130d 12h /openmsp430/trunk/core/
175 Update hardware breakpoint unit with the followings:
- fixed hardware breakpoint bug with CALL instructions.
- modified data read watchpoint behavior to also trigger with read/modify/write instructions.
- removed unused ports.
olivier.girard 4147d 13h /openmsp430/trunk/core/
174 Cleanup dmem_wr generation logic. Important note: this is not a bug fix, only beautification. olivier.girard 4147d 13h /openmsp430/trunk/core/
154 The serial debug interface now supports the I2C protocol (in addition to the UART) olivier.girard 4254d 13h /openmsp430/trunk/core/
151 Add possibility to configure custom Program, Data and Peripheral memory sizes. olivier.girard 4339d 12h /openmsp430/trunk/core/
149 Update simulation regression result parser.
Fixed failing SFR test (due to newer MSPGCC version).
Implement request http://opencores.org/bug,view,2171 (burst accesses through the serial debug interface)
olivier.girard 4342d 14h /openmsp430/trunk/core/
145 Add Dhrystone and CoreMark benchmarks to the simulation environment. olivier.girard 4392d 13h /openmsp430/trunk/core/
142 Beautify the linker script examples. olivier.girard 4413d 14h /openmsp430/trunk/core/
141 Update verification environment to support MSPGCC Uniarch (based on GCC 4.5 and later) olivier.girard 4417d 13h /openmsp430/trunk/core/
139 Add some SVN ignore patterns olivier.girard 4429d 23h /openmsp430/trunk/core/
138 Update simulation scripts to support Cygwin out of the box for Windows users. olivier.girard 4429d 23h /openmsp430/trunk/core/
134 Add full ASIC support (low-power modes, DFT, ...).
Improved serial debug interface reliability.
olivier.girard 4461d 13h /openmsp430/trunk/core/

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