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[/] [openmsp430/] [trunk/] [fpga/] [OBSOLETE/] [altera_de1_board/] - Rev 223

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Rev	Log message	Author	Age	Path
221	Move old Altera-DE1 project to the OBSOLETE directory. Create new Altera-DE0-Nano-SoC project, also containing a small demo of the openGFX430 graphic controller.	olivier.girard	2860d 16h	/openmsp430/trunk/fpga/OBSOLETE/altera_de1_board/
212	Update all FPGA project examples to support both MSPGCC and TI/RedHat GCC toolchains.	olivier.girard	3135d 02h	/openmsp430/trunk/fpga/altera_de1_board/
205	Thanks again to Johan W. good feedback, the following updates are implemented: - Change code to fix delta cycle issues on some simulators in mixed VHDL/Verilog environment. - Update oscillators enable generation to relax a critical timing paths in the ASIC version. - Add option to scan fix inverted clocks in the ASIC version (disabled by default as this is supported by most tools).	olivier.girard	3259d 16h	/openmsp430/trunk/fpga/altera_de1_board/
204	Fix DMA interface RTL merge problem (defines got wrong values). Fix CDC issue with the timerA (thanks to Johan for catching that).	olivier.girard	3266d 17h	/openmsp430/trunk/fpga/altera_de1_board/
202	Add DMA interface support + LINT cleanup	olivier.girard	3273d 16h	/openmsp430/trunk/fpga/altera_de1_board/
200	Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains.	olivier.girard	3434d 15h	/openmsp430/trunk/fpga/altera_de1_board/
193	Update FPGA projects with latest core RTL changes.	olivier.girard	3834d 17h	/openmsp430/trunk/fpga/altera_de1_board/
190	Remove dummy memory read access for CMP and BIT instructions.	olivier.girard	3974d 17h	/openmsp430/trunk/fpga/altera_de1_board/
188	Add missing include commands for the define and undefine files in the wakeup_cell and in dbg_i2c.	olivier.girard	3986d 17h	/openmsp430/trunk/fpga/altera_de1_board/
186	Fixed Hardware Multiplier byte operations bug: http://opencores.org/bug,assign,2247	olivier.girard	4087d 17h	/openmsp430/trunk/fpga/altera_de1_board/
185	Update Altera FPGA example bitstream (no functional change... only generated with a newer Quartus version)	olivier.girard	4088d 18h	/openmsp430/trunk/fpga/altera_de1_board/
184	Fixed some project settings for newer Quartus version (12.1)	olivier.girard	4088d 18h	/openmsp430/trunk/fpga/altera_de1_board/
181	Update with latest oMSP Core version.	olivier.girard	4129d 16h	/openmsp430/trunk/fpga/altera_de1_board/
178	Update all linker scripts with a simplified version. Thanks to Mihai M. for this one :-)	olivier.girard	4138d 16h	/openmsp430/trunk/fpga/altera_de1_board/
176	Update FPGA projects with latest openMSP430 core RTL	olivier.girard	4155d 16h	/openmsp430/trunk/fpga/altera_de1_board/
155	Update FPGA projects with the latest openMSP430 verilog code.	olivier.girard	4262d 16h	/openmsp430/trunk/fpga/altera_de1_board/
151	Add possibility to configure custom Program, Data and Peripheral memory sizes.	olivier.girard	4347d 15h	/openmsp430/trunk/fpga/altera_de1_board/
149	Update simulation regression result parser. Fixed failing SFR test (due to newer MSPGCC version). Implement request http://opencores.org/bug,view,2171 (burst accesses through the serial debug interface)	olivier.girard	4350d 17h	/openmsp430/trunk/fpga/altera_de1_board/
143	Update FPGA software examples to support MSPGCC Uniarch.	olivier.girard	4421d 17h	/openmsp430/trunk/fpga/altera_de1_board/
138	Update simulation scripts to support Cygwin out of the box for Windows users.	olivier.girard	4438d 02h	/openmsp430/trunk/fpga/altera_de1_board/

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[/] [openmsp430/] [trunk/] [fpga/] [OBSOLETE/] [altera_de1_board/] - Rev 223

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