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[/] [openmsp430/] [trunk/] [fpga/] - Rev 208

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Rev	Log message	Author	Age	Path
205	Thanks again to Johan W. good feedback, the following updates are implemented: - Change code to fix delta cycle issues on some simulators in mixed VHDL/Verilog environment. - Update oscillators enable generation to relax a critical timing paths in the ASIC version. - Add option to scan fix inverted clocks in the ASIC version (disabled by default as this is supported by most tools).	olivier.girard	3230d 21h	/openmsp430/trunk/fpga/
204	Fix DMA interface RTL merge problem (defines got wrong values). Fix CDC issue with the timerA (thanks to Johan for catching that).	olivier.girard	3237d 22h	/openmsp430/trunk/fpga/
202	Add DMA interface support + LINT cleanup	olivier.girard	3244d 21h	/openmsp430/trunk/fpga/
200	Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains.	olivier.girard	3405d 20h	/openmsp430/trunk/fpga/
197	Fixed bug on the write strobe of the baudrate hi configuration register.	olivier.girard	3762d 22h	/openmsp430/trunk/fpga/
193	Update FPGA projects with latest core RTL changes.	olivier.girard	3805d 22h	/openmsp430/trunk/fpga/
190	Remove dummy memory read access for CMP and BIT instructions.	olivier.girard	3945d 22h	/openmsp430/trunk/fpga/
188	Add missing include commands for the define and undefine files in the wakeup_cell and in dbg_i2c.	olivier.girard	3957d 22h	/openmsp430/trunk/fpga/
186	Fixed Hardware Multiplier byte operations bug: http://opencores.org/bug,assign,2247	olivier.girard	4058d 22h	/openmsp430/trunk/fpga/
185	Update Altera FPGA example bitstream (no functional change... only generated with a newer Quartus version)	olivier.girard	4059d 22h	/openmsp430/trunk/fpga/
184	Fixed some project settings for newer Quartus version (12.1)	olivier.girard	4059d 23h	/openmsp430/trunk/fpga/
181	Update with latest oMSP Core version.	olivier.girard	4100d 21h	/openmsp430/trunk/fpga/
179	Update all linker scripts with a simplified version. Thanks to Mihai M. for this one :-)	olivier.girard	4109d 21h	/openmsp430/trunk/fpga/
178	Update all linker scripts with a simplified version. Thanks to Mihai M. for this one :-)	olivier.girard	4109d 21h	/openmsp430/trunk/fpga/
176	Update FPGA projects with latest openMSP430 core RTL	olivier.girard	4126d 21h	/openmsp430/trunk/fpga/
171	Update in order to add Hardware breakpoint support. Hardware breakpoint are here only added for development purpose in order to add multi-core features as well as software & hardware breakpoint support to the GDB-Proxy.	olivier.girard	4160d 19h	/openmsp430/trunk/fpga/
168	Add missing second oMSP system.	olivier.girard	4181d 21h	/openmsp430/trunk/fpga/
167	Update LX9 Microboard FPGA example. It now includes a dual-core oMSP system with a shared 16kB program memory. Each core has its own 2kB data memory and an additional 2kB shared data memory.	olivier.girard	4181d 21h	/openmsp430/trunk/fpga/
165	Add missing I2C address in the README file.	olivier.girard	4195d 21h	/openmsp430/trunk/fpga/
162	Add some more SVN ignore patterns. Update testbench.	olivier.girard	4233d 20h	/openmsp430/trunk/fpga/

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[/] [openmsp430/] [trunk/] [fpga/] - Rev 208

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