Hi there!
I have a problem with my project i am currently working on.
I have to send a bmp image from the PC(with an desktop application) via the RS-232 serial to the Spartan-3 Board which must transfer the picture through the SPI to the LCD.
I've downloaded the SPI core form open cores and adapted it for my LCD. I created a Control unit ( a machine state ) which can initialize the LCD and draw a square on it.
Now I have to connect the serial bloc to the control unit and modify this unit to transfer the data from the serial to the LCD. Can someone help me with this please?

Sounds like a fun project, very similar to one I am about to work on. I'm using a different chip, however. I have yet to write the SPI controller that I will need the board, although I've built several in the past. My plan was to build such a controller, and then use a DMA peripheral that I had built, controlled by a CPU, to write to it. This is probably overkill for what you are trying to do, but it's my own plan going forward.

It also sounds like all you need to do is to reformat the data from the BMP format to the LCD format, no? Is the board supposed to handle all BMP formats, BMP formats of a specific size and bits per pixel, or some other BMP format?

What seems to be the problem?

Dan

Hello .. Thanks for the short notice
I already started working on the pc application , and I almost finished it.. The problem I have is that I need to do the internal connections in the fpga and the code that does this ( connect the serial bloc to the control unit ) .. And i need to write the code in the control unit that gets the data from the serial and transfer it to the LCD . Do you have a facebook or something to discuss more about this please ? Maybe you could help me

Isn't that piece as simple as "if (serial port receives a sample) then write_it_to_LCD;"? Sure, you'll need to write an initial command to the LCD so that it knows its expecting data, but there can't be much more to it than that.

Ok, so there are speed issues: which is faster, the serial port or the LCD? Is it possible that the serial port will send data faster than you can send it to the LCD? The easy answer there is to lower the serial port baud rate ...

Dan

My 0.02USD...

This honestly sounds a bit like an end of term project, and it would probably be appropriate for you to seek assistance from your instructor. Most projects, of this type, tend to assume that your work is your own... I took five minutes to look at your code, and if you're unable to integrate a UART, assuming that the rest of the work belongs to you, I think it's important that you consult with your instructor.

Okay .. First things first . I am quite new to VHDL . This is indeed a final project so I am very interested to succesfully finish it . As I told before , the SPI core is from this site (opencores) and it is modified for my needs . The control unit is the build I did with the professor . As you said , dgisselq , the command is as simple as "if (serial port receives a sample) then write_it_to_LCD;" . But I don't have a working serial communication for Spartan-3 Starter Board .
I need a serial core that works at a frequency lower than the SPI . I would use the standard 9600 baud rate , but I think I also need a clock divider to lower even more the clock ...
I don't know . As I said before , I'm new to VHDL , I'm not a rocket scientist . For a experienced user I know that he can build the core in a couple of hours and finish what I have to do , but for a non-experienced user it's far more difficult.
So , is anyone willing to help me ?

If what you are looking for and needing is a serial port, check out the projects link to the left, look under communication controllers for "UART" (Universal Asynchronous Receiver and Transmitter, IIRC). You should find quite a number of serial ports that you can then choose from. You may find it helpful to pare the list down by choosing only those that have been FPGA proven, or that have documentation. Certainly, you'll only want the ones that have files associated with their projects.

Dan

Update
I finally managed to implement the serial bloc and it works ( I verified it on the board) .
Thank you Dan for your advices ( I've already downloaded all the uart communication from the project list , but I found on the internet one UART project , tested and verified on Spartan3E , so it was ok ) .
I tried to send some data using HERCULES and TERA TERM on the serial ( this time with the LCD connected ) but all it does is to fill the rectangle shape with black color . I don t think that the easy way to "if (some_data_on_serial) then data_to_LCDMention - The serial I have has a 115200 baud rate and the divided clock works some where at 1.8 Mhz . I think it is pretty close the to SPI's clock ...
I will update the project in this form (with the serial bloc implenented and connected to the control) . If anyone has any ideas how to cache , or buffer the data from the serial in order to send it via spi , I am open for suggestions . You can even modify the project if you want to help .

First... Let me refer you to the FAQ... http://opencores.org/opencores,faq#canyouhelp

Second... Seek help from your instructor, or, as allowed by your school's honor code, your local colleagues... My guess is that your instructor expects this work to be your own...

Third... If this is an end of term project, this shouldn't be that difficult... If you've been paying attention in class, you shouldn't be THAT new to VHDL (and this is an excuse anyway)... This *isn't* rocket science, and I'd suggest that part of the point of the project *IS* the struggle... No one here wants to deprive you of this fine experience... The sooner you get to it, the sooner you'll finish up...

Best!

/jw

What core exactly? OpenCores has several different SPI cores. I am the author of one of these (the spi_master_slave core).
I'm glad to know that you have modified it to fit your needs. So, the work is done then?




Hm. Not necessarily. You need to analyze the average data update rate and design accordingly. At 9600baud, you will have ~850 chars per second. That may allow you to update your display at ~80frames per second for ~10 byte frames.
Usually, a FIFO is the best interface for such a display, and you can size the FIFO to hold the burst data rate of the input.

Regarding help with the coding itself, I recommend against doing that. You can discuss your approach in a forum like this, research online for circuitry, even get VHDL code here at OpenCores and abroad. But integrating the cores, changing their behavior, and writing your logic should be original work done by yourself.

Of course you can always discuss the design approach, ask for opinions, and exchange views, but it is important that you do the writing and testing yourself.

- Jonny

Ok .. First of all , sorry for the misspelling or grammar mistakes .
The SPI core is SPI Master/Slave Interface .
I asked absolutely everyone I know , colleagues , university teachers , acquaintances . There are very few VHDL users and most of them , in my case none ,are not willing to try to help me . I'm sorry if asking for your help offended you . Your pieces of advice helped me a lot but I still haven't managed to finish my project ... I'm not a quitter but I am starting to have my doubts about finishing this project :) .
I'll keep trying , thanks again for your advice .

Last question please .
I implemented the serial core and the fifo buffer .
How do I do something like this in ctrl unit? (a counter for the data received on the serial):
if data_available_on_serial then
for RGB="00" data_to_send_on_spi for RGB="01" data_to_send_on_spi for RGB="10" data_to_send_on_spi can anyone give me an idea on how to make this counter for the data please?

Hi rada_lucian,



I am the writer of that core. Have you got any issues using or changing it?
You mentioned attaching a FIFO to the SPI parallel interface, which should be straightforward, but has its challenges. Have you been able to do that?
What changes to the controller circuit did you do? Have you tested them?



I'm not offended at all. As a matter of fact, I have helped many people in their final graduation work. Just none of them entailed writing essays or doing the actual work.
If you need support to bounce ideas, specific support in the spi_master_slave core, or an open discussion about the design approach, feel free to ask/post them here.
I just do not consult privately, do not write code or design circuits on behalf of people, and all the resulting work must be made public and acknowledged.

- Jonny

You have not offended me either.

You do know how to make a counter in VHDL, don't you? How about a state machine? You will find both of these concepts valuable while working with this problem.

Unlike Jonny, I do consult privately and I am more than willing to write code or assist in circuit design on behalf of whoever is willing to pay me. Still, though, I have my standards: I will not do someone else's homework. That sort of defeats the purpose.

One piece of advice I will offer to any engineer, student or otherwise, is to plan for failure. I will attest, from my own experience, that the more times I "fail" between the beginning of an assignment and when I need to turn it in, the better the result tends to be. This does bring up an interesting question: when is your due date? How much time do you have left for making mistakes and "failures" on your way to success? That'll help to determine how well you can expect to do.

Dan

Here's the deal Dan . I implemented the counter in the control , the conditions for the transfer of data to take place (between the fifo buffer and the control), the serial with the buffer , the spi looks ok ( as long as i could draw a square on it , I'd say it works ) .. This project does not mean the end of term project . This project is for my diploma degree at the end of the faculty ... Consider this .. I worked my ass off for 4 entire years to become an engineer and , my bad luck , I ended doing this project , and the teacher won't offer me any help ( just one semester in 4 years I did vhdl) . I spoke with the teacher today actually and he told me "if I don t see a picture on that LCD I won t propose you to sustain your presentation (which basically means that I can t sustain my diploma ).. In my faculty , I have a lot of friends whose teachers helped them a lot or gave them the actual project .. All they did in the past month , month and a half, was writing a simple docume,tation about their project .. I'm not complaining about anything but I'm sick of this entire "parade" .. It even cross my mind not to sustain my project at all , fact given that a teacher can really mess with your life like this (my case) ..
Deadline is on 18 this month , so that leaves me about 4-5 days to make more "mistakes" ..
If what you said , or what I understood (my sleep in the last month was not that great) is that you are willing to help me for money .. If that is true my email is rada.lucian@gmail.com .. We'll discuss more about the subject there .
P.S. I really hope you'll mail me fast .
Lucian