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Extra memory access controls
by mbelaoucha on Sep 22, 2011 		mbelaoucha
Posts: 3
Joined: Sep 2, 2011
Last seen: Mar 23, 2012
Hi All,

I started playing with or1ksim two weeks ago ... i think i'm able to start customizing it for my own use. However, i wish to get your opinion about some issues.

So, I wish to add some extra controls on memory accesses (read/write). So far, I think that the best way to do that is to customize "read_memX" and "set_memX" (X in {8,16,32,64}). Am I getting things wrong? maybe a better way?

My second question is a little bit different, i need to maintain a correct commited instruction count. Do or1ksim, when minor exceptions occur (cache, utlb misses), execute the acception handler, or at least count the instruction number whithin it?

My best regards,
M. B.
RE: Extra memory access controls
by jeremybennett on Sep 22, 2011 		jeremybennett
Posts: 815
Joined: May 29, 2008
Last seen: Jun 13, 2019

Hi All,

I started playing with or1ksim two weeks ago ... i think i'm able to start customizing it for my own use. However, i wish to get your opinion about some issues.

Hi M.B.

Excellent news. Two requests.

  1. When you make changes, please comment it in a way that Doxygen can process it, to help others who come after you.

  2. Please update the final section of the user guide with anything you learn about the internal structure of Or1ksim.

So, I wish to add some extra controls on memory accesses (read/write). So far, I think that the best way to do that is to customize "read_memX" and "set_memX" (X in {8,16,32,64}). Am I getting things wrong? maybe a better way?

I've not looked in great detail at this, but I think this seems correct. If you could work out exactly how the memory access functions work and document it, that would be very helpful.

My second question is a little bit different, i need to maintain a correct commited instruction count. Do or1ksim, when minor exceptions occur (cache, utlb misses), execute the acception handler, or at least count the instruction number whithin it?

I believe this is the case. You might want to turn on instruction tracing (there's a l.nop for that) in a test program and see if Or1ksim count matches what you see in the trace.

We'll be delighted to incorporate any improvements you can make. Here's how to submit them.

  1. Please submit your changes for review on the OpenRISC mailing lists rather than this forum, since that is where most of the developers hang out.

  2. Add tests to the testsuite for any new functionality you add. Embecosm Application Note 8 can help you with getting testing working.

  3. Ensure "make distcheck" runs successfully.

If you have questions, IRC (channel #opencores on freenode.net) is a good place to ask. Lots of the regular developers online there.

We look forward to your contributions.

Best wishes

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