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Details

Name: rsa_512
Created: Mar 7, 2010
Updated: Oct 24, 2012
SVN Updated: Jan 12, 2011
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 2 reported / 1 solved
Star6you like it: star it!

Other project properties

Category:Crypto core
Language:VHDL
Development status:Stable
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL

Description

The project presents an open-source implementaion of the 512 bit RSA algorithm. This is a reduced version of a full FIPS Certified capable RSA Crypto-core.

The full version supports all key sizes (512, 1024, 2048, 4096) and includes a complete testbench. It can reach more than 150 operations per second with a 1024 key size in a Spartan 6 FPGA and more than 200 in a Virtex 6.

The core fits in a XC6SLX25T, which makes it a nice solution for mobile devices needing RSA acceleration.

For more information contact jcastillo@opencores.org

Please read carefully the documentation. Some cores should be generated calculated prior to use.

Thanks to Oleg Rasulov for their contributions.