OpenCores

Project maintainers

Details

Name: 4_fir_filter
Created: Jan 2, 2021
Updated: Jan 2, 2021
SVN: No files checked in
Bugs: 0 reported / 0 solved
Star4you like it: star it!

Other project properties

Category:DSP core
Language:Verilog
Development status:Stable
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL

Description

Please write a description of the project here. It is used as a MetaTag (search engines looks at this).

The url of the svn repository is: https://opencores.org/websvn/listing/4_fir_filter/4_fir_filter