a VHDL 16550 UART core

The VHDL 16550 UART generates an error using Xilinx iSim (I’m using 12.3 M.70d). Ther error is: ERROR: Value -2147483648 is out of valid range : 0 TO 8

This is caused by line 29 of gh_uart_Rx_8bit.vhd, which reads: num_bits : in integer; I think that this should read num_bits : in integer:=8;