ccox

Biquad IIR Filter Core

## Specifications

\- IIR filter with two poles and two zeros  
\- Data width set by user  
\- Coefficient width set by user up to 16 bits  
\- Wishbone interface for read and write of filter coefficient registers  
\- Multiple filters can be combined to form filters with more than two poles and zeros

## Description

The difference equation for the biquad filter is:  
  
y\[n\] = b10\*x\[n\] + b11\*x\[n-1\] + b12\*x\[n-2\] + a11\*y\[n-1\] + a12\*y\[n-2\]  
  
This equation is implemented as shown below:

## IMAGE: bquad\_blk.gif

FILE: bquad\_blk.gif  
DESCRIPTION:  

## Synthesis

Synthesized with Synopsys FPGA Express version 2000.11-FE3.5.

If you use this core please let me know.


<h2 id="specifications">Specifications</h2>
<p>- IIR filter with two poles and two zeros <br />
- Data width set by user <br />
- Coefficient width set by user up to 16 bits <br />
- Wishbone interface for read and write of filter coefficient registers <br />
- Multiple filters can be combined to form filters with more than two poles and zeros</p>
<h2 id="description">Description</h2>
<p>The difference equation for the biquad filter is:<br />
<br />
y[n] = b10*x[n] + b11*x[n-1] + b12*x[n-2] + a11*y[n-1] + a12*y[n-2]<br />
<br />
This equation is implemented as shown below: </p>
<h2 id="image-bquad-blk-gif">IMAGE: bquad_blk.gif</h2>
<p>FILE: bquad_blk.gif<br />
DESCRIPTION: <br />
</p>
<h2 id="synthesis">Synthesis</h2>
<p>Synthesized with Synopsys FPGA Express version 2000.11-FE3.5.</p>
<h2 id=""></h2>
<p>If you use this core please let me know.</p>


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Biquad IIR Filter Core

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Description

IMAGE: bquad_blk.gif

Synthesis