Cores are generated from Confluence; a modern logic design language. Confluence is a simple, yet highly expressive language that compiles into Verilog, VHDL, and C. See Confluent.org for more info. The core is provided in Verilog, Vhdl, C, and Python. Low-density parity-check (LDPC) codes are forward error correction codes invented by Robert Gallager in the early 60's. LDPC codes have record breaking error correction performance and approach Shannon's limit for channel capacity.
This LDPC error corrector implements Gallager's "A" algorithm: an iterative, hard-decision decoder that opts for simplicity over performance. The architecture elaborates all logic required to implement the message-passing algorithm from message nodes, to check nodes, then back to message nodes -- one iteration occurs every clock cycle.
The core is primarily meant as an LDPC evaluation platform, as the fully parallel architecture may be inappropriate for synthesis of large block length LDPC decoders.
The Confluence source code generates an LDPC error corrector given an arbitrary parity-check matrix. This core implements Gallager's (20, 3, 4) parity-check matrix:
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