cpu65c02_tc - R65C02 Processor Soft Core with accurate timing

Feb 19, 2021v2.00 PRODUCTION HIGH SPEED variant and v1.53 PRODUCTION releasedGutschmidt, Jens
Oct 14, 2018Upcoming v2.00rc PERFORMANCE IMPROVEMENTS - fmax is now typical from 110 MHz to 180 MHz even for low/middle cost FPGA devices. High End FPGA devices allow clock rates over 250 MHz now.Gutschmidt, Jens
Sep 10, 2018v1.52 PRODUCTION releasedGutschmidt, Jens
Sep 10, 2018RESET generates SYNC now, 1 dead cycle delayedGutschmidt, Jens
Sep 9, 2018RC v1.52 available - Fix cycle counts in branches & INT, fixes in JMP, ADC, SBCGutschmidt, Jens
Aug 2, 2013"BETA" changed to "RELEASE CANDIDATE" with major bug fixes - all op codes tested nowGutschmidt, Jens
Mar 15, 2010Updated HTML of project status - BUG FIX for NMI & IRQ comes at a later timeGutschmidt, Jens
Feb 25, 2009BUG FIX "RTI" (wrong: use of stack pointer) CORRECT "RMBx" & "SMBx" (wrong: bit translation) CORRECT timing for addressing mode "ABS,X" for "INC" Gutschmidt, Jens
Jan 4, 2009Changes commited to CVSGutschmidt, Jens
Jan 4, 2009Updated BETA release - Removed unused nets, registers and modules. Updated documentation.Gutschmidt, Jens
Dec 1, 2008BUGS fixed - Please check "Tracker -> "Bugs"Gutschmidt, Jens
Aug 13, 2008BUGS found - Please check "Tracker" -> "Bugs"Gutschmidt, Jens
Aug 5, 2008Loading source files "rtl" up to the CVS. STATE=BETAGutschmidt, Jens
Apr 12, 2008Project startedAdmin, OpenCores