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erm16
Overview
Downloads
Bugtracker
News
Project maintainers
Nechaev, Artem
Details
Name: erm16
Created: Jan 21, 2020
Updated: Jan 24, 2020
SVN:
No files checked in
Bugs:
0 reported / 0 solved
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Other project properties
Category:
Processor
Language:
Verilog
Development status:
Beta
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL
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README.md
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