The core includes Roberts, Prewitt, Scharr, and Sobel edge detector algorithms. The design is fully pipelined. The latency is 5. After 5 clocks, it produces output at each clock. The desisn is generic as well. You can use the edge detector in the top module. Only the related hardware is generated.
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The url of the svn repository is: https://opencores.org/websvn/listing/fully-pipelined-edge-detection-algorithms/fully-pipelined-edge-detection-algorithms