LCD Driver

Description

LCD Driver that we want to designed is a CMOS LCD driver capable of driving a multiplexed display of up to 128 segments ( 16 columns by 8 backplanes ). The number of backplanes being driven is programmable from one to eight. Data to be displayed is sent to the chip serially and stored in an internal RAM. An external resistor and capasitor control the frequency of the driving signals to the LCD. The displayed data may also be read serially from the on-chip RAM.

Specifications

- Operates on 22-bits (five bits first is address, the next bit is read and write flags, and 16 bits data )
- Can be programmed to accept oscillator output
- Can be programmed to backplane signals of another LCD Driver for cascading purposes.
- Can driving a multiplexed display
- For backplane capacitance under 2000 pF LCD driver guarantees an offset of less than 10 mV.
- Power supply of VDD is 5 V - 15 V.

IMAGE: LCD.ht1.gif

FILE: LCD.ht1.gif
DESCRIPTION:

Design Stages

- Make core specifications
- Design the behavioral and structural VHDL using Alliance tools
- Implementation to symbolic layout
- Full verifications
- Converting to real layout
- Make full report

Status

• Make the behavioral and structural VHDL using Alliance tools
• To know a little bit about Alliance, click this
• You can download our work documentation (Alliance VHDL code) here. 

Authors

• Mima@manufel.paume.itb.ac.id
• hendrag01@s.ee.itb.ac.id
• iyon@s.ee.itb.ac.id
• ssarwono@ieee.org