Discrete Cosine Transform core

I am trying to run the testbench in this project using NVC (https://github.com/nickg/nvc).

I am using their recommended way to generate the simulation files using the command

nvc -a MDCT_PKG.vhd MDCTTB_PKG.vhd ROMO.VHD ROME.VHD RAM.VHD CLKGEN.VHD DBUFCTL.VHD DCT1D.vhd DCT2D.VHD MDCT.VHD random1.vhd INPIMAGE.VHD MDCT_TB.VHD -e my_tb -r

However, upon running this, I get an error which says

	File MDCTTB_PKG.vhd, Line 47
              of REAL(ROMDATA_W-1 downto 0);```

Any help is greatly appreciated.

By changing the definition of COEM_TYPE in MDCTTB_PKG.VHD from

type COEM_TYPE is array (0 to N/2-1, 0 to N/2-1) of REAL(ROMDATA_W-1 to 0);

to

type COEM_TYPE is array (0 to N/2-1, 0 to N/2-1) of REAL(REAL(ROMDATA_W)-1.0 to 0.0);

then I get the errors

** Error: type of element INTEGER does not match base type of aggregate REAL
	File MDCTTB_PKG.vhd, Line 191
                                (AP,AP,AP,AP),
                                 ^^
** Error: type of element INTEGER does not match base type of aggregate REAL
	File MDCTTB_PKG.vhd, Line 199
                                (DP,EP,FP,GP),