Discrete Cosine Transform core
News
| Mar 17, 2009 | Multiple stage pipeline inserted for final adders to highly improve timing at expense of area | Krepa, Michal |
| Mar 7, 2009 | Changes commited to CVS | Krepa, Michal |
| Apr 27, 2006 | Redesigned, now computes DCT coefficient every clock cycle. Release MDCT_REL_B1_5 | Krepa, Michal |
| Apr 26, 2006 | Changes commited to CVS | Krepa, Michal |
| Apr 22, 2006 | MDCT_REL_B1_4: Improved performance by 8%, latency reduced to 94 clock cycles | Krepa, Michal |
| Apr 22, 2006 | Changes commited to CVS | Krepa, Michal |
| Apr 21, 2006 | Release MDCT_REL_B1_3 changed ROM model to synchronous | Krepa, Michal |
| Apr 21, 2006 | Changes commited to CVS | Krepa, Michal |
| Apr 15, 2006 | Source code uploaded (Beta Release) | Krepa, Michal |
| Apr 14, 2006 | Project started | lampret |
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