Memory Controller IP Core

initializing SDRAM's mode register #3

Open igorb opened this issue almost 15 years ago

If there is no other WB cycles then these which writes into memory controller's registers, initialization of SDRAM's mode register fails. Replacing "if((cs_le_d | rf_we) & wb_cyc_i & wb_stb_i)" (line 424 in "mc_rf.v") with "if(cs_le_d | rf_we)" should solve the problem.