mod3_calc
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Details
Name: mod3_calc
Created: Oct 9, 2010
Updated: Oct 11, 2010
SVN Updated: Oct 11, 2010
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
Created: Oct 9, 2010
Updated: Oct 11, 2010
SVN Updated: Oct 11, 2010
SVN: Browse
Latest version: download (might take a bit to start...)
Statistics: View
Bugs: 0 reported / 0 solved
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Other project properties
Category:Arithmetic core
Language:Verilog
Development status:Alpha
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL
Language:Verilog
Development status:Alpha
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL
Description
A quick & simple mod 3 calculator(only just combinational logic). the input 8-bit data is divided by 3. and the output is only 0, 1, or 2.
I use XilinxISE10.1 Synthesis the file, the speed can reach 113MHz.
If anyone want make it more faster, you can insert some registers and make it pipeline.
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