The openGFX430 is a synthesizable Graphic controller written in Verilog and tailored for the openMSP430 core.
An example implementation based on the DE0-Nano-SoC and LT24 daughter board from Terasic can be found in the openMSP430 FPGA section (see here).
Support of the following graphic modes:
16bpp
1bpp
Smart address generation unit for fast indirect memory access.
In no particular priority order:
RTL:
Add support popular video interfaces (i.e. probably SPI and VGA in addition to LT24).
Hardware cursor
Others:
Add proper block level verification environment.
The complete tar archive of the project can be downloaded here (OpenCores account required).
The following SVN command can be run from a console (or GUI):
svn export http://opencores.org/ocsvn/opengfx430/opengfx430/trunk/ opengfx430