ORPSoC
Project maintainers
Details
Name: orpsoc
Created: Aug 31, 2011
Updated: Aug 31, 2011
SVN: Check description below for external links
Bugs: 0 reported / 0 solved
Created: Aug 31, 2011
Updated: Aug 31, 2011
SVN: Check description below for external links
Bugs: 0 reported / 0 solved
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Other project properties
Category:System on Chip
Language:Verilog
Development status:Planning
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL
Language:Verilog
Development status:Planning
Additional info:
WishBone compliant: No
WishBone version: n/a
License: LGPL
Description
The goal of ORPSoC is to provide a complete System On Chip based on the OpenRISC CPU.
The current version ORPSoCv2 is hosted in the openrisc tree. It can be checked out with
svn co http://opencores.org/ocsvn/openrisc/openrisc/trunkorpsocv2
The documentation for ORPSoC is currently spread out in the OpenRISC project,
but a good starting point is the OpenRISC wiki, especially this page http://opencores.org/or1kORPSoC
The bugtracker for the ORPSoC project is found in OpenCores bugzila:
http://bugzilla.opencores.orgbuglist.cgi?product=OpenRISC&component=ORPSoC
A new version, orpsocv3 has just started planning.
Some ideas are gathered here http://opencores.org/or1kORPSoCv3
More information is yet to come
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